1. Field of the Invention
The invention relates to the field of semiconductor fabrication. More particularly, the invention is a method for eliminating dissolution and/or corrosion of metallic conductors induced by light exposure of partially fabricated semiconductor devices.
2. Description of Related Art
In semiconductor device fabrication there is a constant need for methods to improve the reliability, yield and cost of fabrication while increasing feature density and decreasing feature size. One feature for which reliability is a great concern as its size decreases is the wiring that connects various devices on a chip. One method for creating this wiring is the damascene metal patterning processes. Today, the damascene process is used for a variety of wiring and contacts in semiconductor fabrication, replacing the more expensive traditional reactive ion etch (RIE) metal processing in products such as CMOS memory and logic.
Single damascene is defined as using the damascene process for global wiring and interconnects only. Dual damascene is where damascene wiring is combined with a damascene interconnect for even greater cost reduction.
The damascene metal process involves first etching a trench into a dielectric layer on a semiconductor wafer. The wafer is then covered with a conductor, this conductor filling the trench and covering the dielectric layer. The wafer is then polished, typically using a form of chemical mechanical polish (CMP), down to the dielectric layer. The dielectric layer, typically an oxide, is not as easily polished away by the CMP as the metal. Thus, the oxide serves as a "stop" for the polish process. The CMP leaves the conductor embedded as wires in the dielectric. This process can be used to create global wiring, interconnects, and contacts. The damascene process has been used extensively with tungsten or aluminum as the conductor and silicon dioxide as the dielectric.
As integrated circuit devices and the associated metal lines become smaller, the relatively low conductivity of the tungsten or aluminum begins to become an issue. Because of its better conductivity, copper is a desirable conductor in the damascene process as feature size shrinks. Accordingly, it is also desirable as a conductor in other processes for forming wiring, interconnects, and contacts. However, copper is more susceptible to corrosion than metals used previously, such as tungsten, and its corrosion presents a senous manufacturing problem. Corrosion leads to pitting, that adversely affects the electrical properties of the lines, and also leads to opens in lines. Generally, the CMP environment is corrosive to copper and other metals, so corrosion inhibitors are included with the CMP slurry to prevent unwanted corrosion of metal. Surprisingly, conventional inhibitors are at times ineffective in protecting copper. Also, it is expected that the problem will exist for other metals or alloys susceptible to corrosion that may replace copper in the future. Unless the source of the copper damage can be diagnosed and remedied, serious limitations might be placed on reducing feature size in integrated circuit devices, hampering improvements in device technology. Thus, it can be seen from the above discussion that it would be an improvement in the art to prevent damage to corrosion susceptible metals during fabrication of semiconductor devices.